Sciweavers

391 search results - page 16 / 79
» Efficient Self-Reconfigurable Implementations Using On-chip ...
Sort
View
AHS
2007
IEEE
349views Hardware» more  AHS 2007»
14 years 2 months ago
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
Mustafa Parlak, Ilker Hamzaoglu
CSSE
2008
IEEE
14 years 2 months ago
Design and Implementation of the Virtual Machine Constructing on Register
: The technology of virtual machines is widely applied in many fields, such as code transplanting, cross-platform computing, and hardware simulation. The main purpose is to simulat...
Weibo Xie, Fu Ting
IADIS
2009
13 years 5 months ago
A strategy for cost efficient distributed data storage for in-memory OLAP
With the availability of inexpensive blade servers featuring 32 GB or more of main memory, memory-based engines such as the SAP NetWeaver Business Warehouse Accelerator are coming...
Olga Mordvinova, Oleksandr Shepil, Thomas Ludwig 0...
DCC
1996
IEEE
13 years 11 months ago
On the Implementation of Minimum-Redundancy Prefix Codes
Abstract--Minimum redundancy coding (also known as Huffman coding) is one of the enduring techniques of data compression. Many efforts have been made to improve the efficiency of m...
Alistair Moffat, Andrew Turpin
CGO
2006
IEEE
13 years 11 months ago
Space-Efficient 64-bit Java Objects through Selective Typed Virtual Addressing
Memory performance is an important design issue for contemporary systems given the ever increasing memory gap. This paper proposes a space-efficient Java object model for reducing...
Kris Venstermans, Lieven Eeckhout, Koen De Bossche...