391 search results - page 17 / 79 » Efficient Self-Reconfigurable Implementations Using On-chip ... |
TVLSI
2008
13 years 7 months ago
2008
Up to 53% of the time spent on testing current Intel microprocessors is needed to test on-chip caches, due to the high complexity of memory tests and to the large amount of transis...
ERSA
2004
13 years 9 months ago
2004
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
SIPS
2008
IEEE
14 years 2 months ago
2008
IEEE
In this paper we present an efficient way of doing image reconstruction using the 2D Discrete Fourier transform (DFT). We exploit the fact that in the frequency domain, informati...
INFOCOM
2002
IEEE
14 years 17 days ago
2002
IEEE
A multigigabit IP router may receive several millions packets per second from each input link. For each packet, the router needs to find the longest matching prefix in the forw...
FCCM
2009
IEEE
13 years 11 months ago
2009
IEEE
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...