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178
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FMCAD
2006
Springer
15 years 8 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 9 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
123
Voted
ISPD
2005
ACM
116views Hardware» more  ISPD 2005»
15 years 10 months ago
A fast algorithm for power grid design
This paper presents an efficient heuristic algorithm to design a power distribution network of a chip by employing a successive partitioning and grid refinement scheme. In an it...
Jaskirat Singh, Sachin S. Sapatnekar
AICT
2005
IEEE
157views Communications» more  AICT 2005»
15 years 6 months ago
Fast Retransmission of Real-Time Traffic in HIPERLAN/2 Systems
Automatic repeat request (ARQ) schemes are effective to recover non-real-time data corrupted by channel errors, but their use with real-time traffic is seldom considered because p...
Jose A. Afonso, Joaquim E. Neves
DAC
2005
ACM
16 years 5 months ago
Microarchitecture-aware floorplanning using a statistical design of experiments approach
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...