239 search results - page 31 / 48 » Efficient automatic simulation of parallel computation on ne... |
CCGRID
2001
IEEE
13 years 11 months ago
2001
IEEE
This paper describes the principles of an original adaptive interconnect for a computational cluster. Torus topology (2d or 3d) is used as a basis but nodes are allowed to effecti...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
Acyclic partitioning on combinational boolean networks has wide range of applications, from multiple FPGA chip partitioning to parallel circuit simulation. In this paper, we prese...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
ICPADS
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we present a scheme to assign IP address to each newly-joined node. Some nodes are assigned as coordinators, and are responsible for assigning an IP address to a ne...
MIDDLEWARE
2005
Springer
14 years 27 days ago
2005
Springer
Abstract. Design of distributed architectures for content-based publish-subscribe (pub-sub) service networks has been a challenging problem. To best support the highly dynamic and ...