544 search results - page 106 / 109 » Efficient checker processor design |
NOCS
2007
IEEE
14 years 1 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
ICDE
2008
IEEE
14 years 8 months ago
2008
IEEE
ct The backbone of the XML data model, namely ordered, unranked trees, is inherently recursive and it is natural to equip the associated languages with constructs that can query su...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
We obtain analytically, the energy optimal speed profile of a generic multi-speed device with a discrete set of speeds, to execute a given task within a given time. Current implem...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Most existing dynamic voltage scaling (DVS) schemes for multiple tasks assume an energy cost function (energy consumption versus execution time) that is independent of the task ch...
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
While deterministic replay of parallel programs is a powerful technique, current proposals have shortcomings. Specifically, software-based replay systems have high overheads on mu...