555 search results - page 107 / 111 » Efficient event-driven simulation of parallel processor arch... |
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
While deterministic replay of parallel programs is a powerful technique, current proposals have shortcomings. Specifically, software-based replay systems have high overheads on mu...
TPDS
1998
13 years 7 months ago
1998
—Three-dimensional packaging technologies are critical for enabling ultra-compact, massively parallel processors (MPPs) for embedded applications. Through-wafer optical interconn...
NOCS
2007
IEEE
14 years 1 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
The memory system's large and growing contribution to system performance motivates more aggressive approaches to improving its efficiency. We propose and analyze a memory hie...
SIGGRAPH
1994
ACM
13 years 11 months ago
1994
ACM
This paper describes the design and implementation of IRIS Performer, a toolkit for visual simulation, virtual reality, and other real-time 3D graphics applications. The principal...