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» Efficient hardware code generation for FPGAs
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ICFP
2008
ACM
14 years 7 months ago
Flask: staged functional programming for sensor networks
Severely resource-constrained devices present a confounding challenge to the functional programmer: we are used to having powerful ion facilities at our fingertips, but how can we...
Geoffrey Mainland, Greg Morrisett, Matt Welsh
CODES
2001
IEEE
13 years 11 months ago
Embedded UML: a merger of real-time UML and co-design
In this paper, we present a proposal for a UML profile called `Embedded UML'. Embedded UML represents a synthesis of various ideas in the real-time UML community, and concept...
Grant Martin, Luciano Lavagno, Jean Louis-Guerin
IWMM
1998
Springer
153views Hardware» more  IWMM 1998»
13 years 11 months ago
Compiler Support to Customize the Mark and Sweep Algorithm
Mark and sweep garbage collectors (GC) are classical but still very efficient automatic memory management systems. Although challenged by other kinds of systems, such as copying c...
Dominique Colnet, Philippe Coucaud, Olivier Zendra
FPGA
2008
ACM
174views FPGA» more  FPGA 2008»
13 years 9 months ago
Pattern-based behavior synthesis for FPGA resource reduction
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
Jason Cong, Wei Jiang
CODES
1999
IEEE
13 years 12 months ago
System synthesis utilizing a layered functional model
We propose a system synthesis method which bridges the gap between a highly abstract functional model and an efficient hardware or software implementation. The functional model is...
Ingo Sander, Axel Jantsch