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CODES
2010
IEEE
13 years 5 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
GLVLSI
2006
IEEE
185views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Application of fast SOCP based statistical sizing in the microprocessor design flow
In this paper we have applied statistical sizing in an industrial setting. Efficient implementation of the statistical sizing algorithm is achieved by utilizing a dedicated interi...
Murari Mani, Mahesh Sharma, Michael Orshansky
EACL
2009
ACL Anthology
13 years 5 months ago
Optimization in Coreference Resolution is not Needed: A Nearly-Optimal Algorithm with Intensional Constraints
We show how global constraints such as transitivity can be treated intensionally in a Zero-One Integer Linear Programming (ILP) framework which is geared to find the optimal and c...
Manfred Klenner, Étienne Ailloud
GECCO
2008
Springer
144views Optimization» more  GECCO 2008»
13 years 8 months ago
Multi-resistant radar jamming using genetic algorithms
The next generation of advanced self-protection jammers is expected to deliver effective and energy efficient jamming against modern air tracking radars. However, optimizing such ...
Hans Jonas Fossum Moen, Stein Kristoffersen
ICCAD
2002
IEEE
152views Hardware» more  ICCAD 2002»
14 years 4 months ago
Efficient instruction encoding for automatic instruction set design of configurable ASIPs
Application-specific instructions can significantly improve the performance, energy, and code size of configurable processors. A common approach used in the design of such instruc...
Jong-eun Lee, Kiyoung Choi, Nikil Dutt