76 search results - page 9 / 16 » Efficient reachability checking using sequential SAT |
102
Voted
ICCAD
2002
IEEE
15 years 11 months ago
2002
IEEE
Within the verification community, there has been a recent increase in interest in Quantified Boolean Formula evaluation (QBF) as many interesting sequential circuit verification ...
154
Voted
TABLEAUX
1998
Springer
15 years 6 months ago
1998
Springer
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
168
Voted
AAAI
2008
15 years 3 months ago
2008
In this poster we describe the tabling techniques for Sequential and Concurrent Horn Transaction Logic. Horn Transaction Logic is an extension of classical logic programming with ...
105
Voted
ASPLOS
2008
ACM
15 years 4 months ago
2008
ACM
Speck1 is a system that accelerates powerful security checks on commodity hardware by executing them in parallel on multiple cores. Speck provides an infrastructure that allows se...
140
Voted
ICALP
2009
Springer
16 years 2 months ago
2009
Springer
We present an AC1 (logDCFL) algorithm for checking LTL formulas over finite paths, thus establishing that the problem can be efficiently parallelized. Our construction provides a f...