101 search results - page 10 / 21 » Efficient utilization of scratch-pad memory in embedded proc... |
ISHPC
1999
Springer
13 years 11 months ago
1999
Springer
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
IEEECIT
2010
IEEE
13 years 6 months ago
2010
IEEE
- The increase of embedded applications complexity has demanded hardware more flexible while providing higher performance. Reconfigurable architectures and stream processing have b...
FCCM
2007
IEEE
14 years 1 months ago
2007
IEEE
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
In this paper we describe load scheduling, a novel method that balances load among register files by residual resources. Load scheduling can reduce register pressure for clustered...
ESTIMEDIA
2005
Springer
14 years 1 months ago
2005
Springer
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...