166 search results - page 6 / 34 » Efficient worst case timing analysis of data caching |
ENTCS
2002
13 years 7 months ago
2002
We design an efficient algorithm that maximizes the sum of array elements of a subarray of a two-dimensional array. The solution can be used to find the most promising array porti...
RTSS
2003
IEEE
14 years 26 days ago
2003
IEEE
This paper presents a quantification of the timing effects that advanced processor features like data and instruction cache, pipelines, branch prediction units and out-oforder ex...
INFOCOM
2000
IEEE
13 years 12 months ago
2000
IEEE
Abstract—The problem of route address lookup has received much attention recently and several algorithms and data structures for performing address lookups at high speeds have be...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
CASES
2001
ACM
13 years 11 months ago
2001
ACM
Current development tools for embedded real-time systems do not efficiently support the timing aspect. The most important timing parameter for scheduling and system analysis is th...