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» Efficiently Implementing Episodic Memory
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ISCA
2005
IEEE
121views Hardware» more  ISCA 2005»
14 years 2 months ago
Direct Cache Access for High Bandwidth Network I/O
Recent I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory ...
Ram Huggahalli, Ravi R. Iyer, Scott Tetrick
ARC
2006
Springer
124views Hardware» more  ARC 2006»
14 years 15 days ago
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
Su-Shin Ang, George A. Constantinides, Peter Y. K....
PLILP
1994
Springer
14 years 7 days ago
Deriving Residual Reference Count Garbage Collectors
We present a strategy to derive an efficient reference count garbage collector for any applicative program by only modifying it on the source code level. The key to the approach is...
Wolfram Schulte
DAC
2007
ACM
14 years 9 months ago
A System For Coarse Grained Memory Protection In Tiny Embedded Processors
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...
ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
14 years 2 months ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...