555 search results - page 56 / 111 » Efficiently Implementing Episodic Memory |
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
—As turbo decoding is a highly memory-intensive algorithm consuming large power, a major issue to be solved in practical implementation is to reduce power consumption. This paper...
HOTOS
2009
IEEE
14 years 17 days ago
2009
IEEE
Operating systems can efficiently provide system transactions to user applications, in which user-level processes can execute a series of system calls atomically and in isolation ...
PPOPP
2006
ACM
14 years 2 months ago
2006
ACM
IP forwarding is one of the main bottlenecks in Internet backbone routers, as it requires performing the longest-prefix match at 10Gbps speed or higher. IPv6 forwarding further ex...
ICS
2010
Tsinghua U.
13 years 11 months ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
POPL
2007
ACM
14 years 9 months ago
2007
ACM
We present a formal model of memory that both captures the lowlevel features of C's pointers and memory, and that forms the basis for an expressive implementation of separati...