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» Efficiently generating test vectors with state pruning
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DAC
1997
ACM
13 years 11 months ago
Toward Formalizing a Validation Methodology Using Simulation Coverage
The biggest obstacle in the formal verification of large designs is their very large state spaces, which cannot be handled even by techniques such as implicit state space travers...
Aarti Gupta, Sharad Malik, Pranav Ashar
ET
2010
122views more  ET 2010»
13 years 5 months ago
Fault Models for Quantum Mechanical Switching Networks
This work justifies several quantum gate level fault models and discusses the causal error mechanisms thwarting correct function. A quantum adaptation of the classical test set gen...
Jacob D. Biamonte, Jeff S. Allen, Marek A. Perkows...
CCS
2009
ACM
14 years 2 months ago
False data injection attacks against state estimation in electric power grids
A power grid is a complex system connecting electric power generators to consumers through power transmission and distribution networks across a large geographical area. System mo...
Yao Liu, Michael K. Reiter, Peng Ning
SDM
2008
SIAM
256views Data Mining» more  SDM 2008»
13 years 9 months ago
Graph Mining with Variational Dirichlet Process Mixture Models
Graph data such as chemical compounds and XML documents are getting more common in many application domains. A main difficulty of graph data processing lies in the intrinsic high ...
Koji Tsuda, Kenichi Kurihara
ET
2002
67views more  ET 2002»
13 years 7 months ago
On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST
In this paper we present a new reseeding technique for test-per-clock test pattern generation suitable for at-speed testing of circuits with random-pattern resistant faults. Our te...
Emmanouil Kalligeros, Xrysovalantis Kavousianos, D...