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ICPR
2002
IEEE
14 years 8 months ago
Graph of Neural Networks for Pattern Recognition
This paper presents a new architecture of neural networks designed for pattern recognition. The concept of induction graphs coupled with a divide-and-conquer strategy defines a Gr...
Hubert Cardot, Olivier Lezoray
IPPS
1999
IEEE
13 years 12 months ago
Sparse Hypercube: A Minimal k-Line Broadcast Graph
This paper proposes a method for reducing the maximum degree of vertices in graphs that maintain optimal broadcast time when a vertex can call a vertex at distance at most k durin...
Satoshi Fujita, Arthur M. Farley
DATE
2009
IEEE
120views Hardware» more  DATE 2009»
14 years 2 months ago
Optimizing data flow graphs to minimize hardware implementation
Abstract - This paper describes an efficient graphbased method to optimize data-flow expressions for best hardware implementation. The method is based on factorization, common su...
Daniel Gomez-Prado, Q. Ren, Maciej J. Ciesielski, ...
HPDC
2007
IEEE
14 years 1 months ago
Feedback-directed thread scheduling with memory considerations
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...
Fengguang Song, Shirley Moore, Jack Dongarra
NJC
2006
88views more  NJC 2006»
13 years 7 months ago
Optimizing Slicing of Formal Specifications by Deductive Verification
Slicing is a technique for extracting parts of programs or specifications with respect to certain criteria of interest. The extraction is carried out in such a way that properties ...
Ingo Brückner, Björn Metzler, Heike Wehr...