Sciweavers

526 search results - page 70 / 106
» Embedded Compilation for Multimedia Applications
Sort
View
CASES
2008
ACM
13 years 12 months ago
Reducing pressure in bounded DBT code caches
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
José Baiocchi, Bruce R. Childers, Jack W. D...
VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
14 years 10 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
13 years 1 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...
CODES
2002
IEEE
14 years 2 months ago
Compiler-directed customization of ASIP cores
This paper presents an automatic method to customize embedded application-specific instruction processors (ASIPs) based on compiler analysis. ASIPs, also known as embedded soft c...
T. Vinod Kumar Gupta, Roberto E. Ko, Rajeev Barua
ESTIMEDIA
2006
Springer
14 years 1 months ago
Use of a Bit-true Data Flow Analysis for Processor-Specific Source Code Optimization
Nowadays, key characteristics of a processor's instruction set are only exploited in high-level languages by using inline assembly or compiler intrinsics. Inserting intrinsic...
Heiko Falk, Jens Wagner, André Schaefer