Sciweavers

526 search results - page 82 / 106
» Embedded Compilation for Multimedia Applications
Sort
View
DAC
2005
ACM
13 years 11 months ago
Performance simulation modeling for fast evaluation of pipelined scalar processor by evaluation reuse
This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
Ho Young Kim, Tag Gon Kim
DATE
1998
IEEE
108views Hardware» more  DATE 1998»
14 years 2 months ago
Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor
The demands in terms of processing performance, communication bandwidth and real-time throughput of many multimedia applications are much higher than today's processing archi...
Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin...
CODES
2008
IEEE
14 years 4 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
DAC
1997
ACM
14 years 2 months ago
InfoPad - An Experiment in System Level Design and Integration
The InfoPad project was started at UC Berkeley in 1992 to investigate the issues involved in providing multimedia information access using a portable, wireless terminal. It quickl...
Robert W. Brodersen
ASIAN
2007
Springer
102views Algorithms» more  ASIAN 2007»
14 years 4 months ago
A Static Birthmark of Binary Executables Based on API Call Structure
Abstract. A software birthmark is a unique characteristic of a program that can be used as a software theft detection. In this paper we suggest and empirically evaluate a static bi...
Seokwoo Choi, Heewan Park, Hyun-il Lim, Taisook Ha...