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CSREAESA
2009
13 years 8 months ago
Built-In Self-Test of Embedded SEU Detection Cores in Virtex-4 and Virtex-5 FPGAs
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
Bradley F. Dutton, Charles E. Stroud
ITC
1997
IEEE
92views Hardware» more  ITC 1997»
13 years 11 months ago
A Novel Functional Test Generation Method for Processors Using Commercial ATPG
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests for them is becoming a serious problem in industry. This paper...
Raghuram S. Tupuri, Jacob A. Abraham
DATE
1997
IEEE
100views Hardware» more  DATE 1997»
13 years 11 months ago
On the generation of pseudo-deterministic two-patterns test sequence with LFSRs
Many Built-In Self Test pattern generators use Linear Feedback Shift Registers (LFSR) to generate test sequences. In this paper, we address the generation of deterministic pairs o...
Christian Dufaza, Yervant Zorian
VEE
2012
ACM
269views Virtualization» more  VEE 2012»
12 years 3 months ago
SimTester: a controllable and observable testing framework for embedded systems
In software for embedded systems, the frequent use of interrupts for timing, sensing, and I/O processing can cause concurrency faults to occur due to interactions between applicat...
Tingting Yu, Witawas Srisa-an, Gregg Rothermel
ICCAD
2000
IEEE
95views Hardware» more  ICCAD 2000»
13 years 12 months ago
Test of Future System-on-Chips
Spurred by technology leading to the availability of millions of gates per chip, system-level integration is evolving as a new paradigm, allowing entire systems to be built on a s...
Yervant Zorian, Sujit Dey, Mike Rodgers