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MTV
2003
IEEE
109views Hardware» more  MTV 2003»
14 years 3 months ago
A Methodology for Validation of Microprocessors using Equivalence Checking
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Nikil D. Dutt
AHS
2007
IEEE
239views Hardware» more  AHS 2007»
14 years 1 months ago
Separation of Data flow and Control flow in Reconfigurable Multi-core SoCs using the Gannet Service-based Architecture
This paper presents a mechanism for the separation of control and data flow in NoC-based SoCs consisting of multiple heterogeneous reconfigurable IP cores. This mechanism enables ...
Wim Vanderbauwhede
ASPDAC
2008
ACM
103views Hardware» more  ASPDAC 2008»
13 years 12 months ago
Reliability-aware design for nanometer-scale devices
Continuous transistor scaling due to improvements in CMOS devices and manufacturing technologies is increasing processor power densities and temperatures; thus, creating challenges...
David Atienza, Giovanni De Micheli, Luca Benini, J...
TKDE
2008
123views more  TKDE 2008»
13 years 9 months ago
DiSC: Benchmarking Secure Chip DBMS
Secure chips, e.g., present in smart cards, USB dongles, i-buttons, are now ubiquitous in applications with strong security requirements. Moreover, they require embedded data manag...
Nicolas Anciaux, Luc Bouganim, Philippe Pucheral, ...
MICRO
2007
IEEE
188views Hardware» more  MICRO 2007»
14 years 4 months ago
Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding
In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses...
Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Fal...