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RTAS
2008
IEEE
14 years 3 months ago
Using Trace Scratchpads to Reduce Execution Times in Predictable Real-Time Architectures
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
Jack Whitham, Neil C. Audsley
ISORC
2006
IEEE
14 years 3 months ago
Design Patterns for Releasing Applications in C++ Implementations of JTRS Software Communications Architecture
The Software Communications Architecture (SCA), which has been adopted as an SDR (Software Defined Radio) Forum standard, provides a framework that successfully exploits common de...
Michael Barth, Jonghun Yoo, Saehwa Kim, Seongsoo H...
ICPP
2005
IEEE
14 years 2 months ago
Ferry: An Architecture for Content-Based Publish/Subscribe Services on P2P Networks
Leveraging DHTs (distributed hash table), we propose Ferry, an architecture for content-based publish/subscribe services. With its novel design in subscription installation, subsc...
Yingwu Zhu, Yiming Hu
ISCAS
2005
IEEE
155views Hardware» more  ISCAS 2005»
14 years 2 months ago
Hyperblock formation: a power/energy perspective for high performance VLIW architectures
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
RTCSA
2005
IEEE
14 years 2 months ago
An Overview of the VigilNet Architecture
Battlefield surveillance often involves a high element of risk for military operators. Hence, it is very important for the military to execute unmanned surveillance by using larg...
Tian He, Liqian Luo, Ting Yan, Lin Gu, Qing Cao, G...