1742 search results - page 266 / 349 » Embedded MPLS Architecture |
IPPS
2006
IEEE
14 years 3 months ago
2006
IEEE
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
PARELEC
2006
IEEE
14 years 3 months ago
2006
IEEE
We have developed an application-driven methodology for implementing parallel and heterogeneous programmable platforms. We deploy our flow for network access platforms where we h...
RTAS
2006
IEEE
14 years 3 months ago
2006
IEEE
Multicore architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance, given that thermal and power pr...
DAC
2006
ACM
14 years 3 months ago
2006
ACM
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
ACSD
2005
IEEE
14 years 2 months ago
2005
IEEE
The objective of this paper is to present how to design a system that can accommodate additional functionality with either no changes to the design or adding architectural modules...