1742 search results - page 320 / 349 » Embedded MPLS Architecture |
JCST
2010
13 years 2 months ago
2010
In this paper we introduce an architecture for a multi-key pirate decoder which employs decryption keys from multiple traitors. The decoder has built-in monitoring and self protect...
JDCTA
2010
13 years 2 months ago
2010
With the intent of efficient occupying under-utilized spectrum, radio environment map (REM) based cognitive radio (CR) networking is proposed to facilitate the distributed spectru...
DATE
2011
IEEE
12 years 11 months ago
2011
IEEE
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
NOCS
2007
IEEE
14 years 1 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
ing models and HW-SW Interfaces Abstraction for Multi-Processor SoC Ahmed A. Jerraya TIMA Laboratory 46 Ave Felix Viallet 38031 Grenoble CEDEX, France +33476574759 Ahmed.Jerraya@im...