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SIGSOFT
2006
ACM
14 years 3 months ago
Bit level types for high level reasoning
Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about s...
Ranjit Jhala, Rupak Majumdar
DAC
2004
ACM
14 years 10 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...
HOST
2009
IEEE
14 years 3 months ago
Detecting Trojan Circuit Attacks
Abstract—Rapid advances in integrated circuit (IC) development predicted by Moore’s Law lead to increasingly complex, hard to verify IC designs. Design insiders or adversaries ...
Gedare Bloom, Bhagirath Narahari, Rahul Simha
DAC
2009
ACM
14 years 27 days ago
Reduction techniques for synchronous dataflow graphs
The Synchronous Dataflow (SDF) model of computation is popular for modelling the timing behaviour of real-time embedded hardware and software systems and applications. It is an es...
Marc Geilen
TCAD
2002
98views more  TCAD 2002»
13 years 8 months ago
An Esterel compiler for large control-dominated systems
Embedded hard real-time software systems often need fine-grained parallelism and precise control of timing, things typical real-time operating systems do not provide. The Esterel l...
Stephen A. Edwards