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CODES
2008
IEEE
14 years 5 months ago
Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs
Modern embedded compute platforms increasingly contain both microprocessors and field-programmable gate arrays (FPGAs). The FPGAs may implement accelerators or other circuits to s...
David Sheldon, Frank Vahid
DATE
2008
IEEE
153views Hardware» more  DATE 2008»
14 years 5 months ago
An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications
Novel reconfigurable computing platforms enable efficient realizations of complex signal processing applications by allowing exploitation of parallelization resulting in high thro...
Sankalita Saha, Jason Schlessman, Sebastian Puthen...
NOCS
2008
IEEE
14 years 5 months ago
Network Simplicity for Latency Insensitive Cores
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...
RTAS
2008
IEEE
14 years 5 months ago
A Hybrid DVS Scheme for Interactive 3D Games
Interactive 3D games are now widely available on a variety of mobile devices for which battery-life is a major concern. Many of these devices support voltage/frequencyscalable pro...
Yan Gu, Samarjit Chakraborty
ECRTS
2007
IEEE
14 years 5 months ago
Cache-Aware Timing Analysis of Streaming Applications
Of late, there has been a considerable interest in models, algorithms and methodologies specifically targeted towards designing hardware and software for streaming applications. ...
Samarjit Chakraborty, Tulika Mitra, Abhik Roychoud...
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