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DATE
2007
IEEE
83views Hardware» more  DATE 2007»
14 years 2 months ago
High-level test synthesis for delay fault testability
A high-level test synthesis (HLTS) method targeted for delay fault testability is presented. The proposed method, when combined with hierarchical test pattern generation for embed...
Sying-Jyan Wang, Tung-Hua Yeh
ECRTS
2007
IEEE
14 years 2 months ago
Predictable Paging in Real-Time Systems: A Compiler Approach
Conventionally, the use of virtual memory in real-time systems has been avoided, the main reason being the difficulties it provides to timing analysis. However, there is a trend ...
Isabelle Puaut, Damien Hardy
EUROMICRO
2007
IEEE
14 years 2 months ago
Compatibility and reuse in component-based systems via type and unit inference
In many branches of industry, the component-based approach to systems design is predominant, e. g., as in embedded control systems which are often modelled using MATLAB/Simulink. ...
Christian Kühnel, Andreas Bauer 0002, Michael...
FDL
2007
IEEE
14 years 2 months ago
Mapping Actor-Oriented Models to TLM Architectures
Actor-oriented modeling approaches are convenient for implementing functional models of embedded systems. Architectural models for heterogeneous system-on-chip architectures, howe...
Jens Gladigau, Christian Haubelt, Bernhard Niemann...
GLOBECOM
2007
IEEE
14 years 2 months ago
Minimizing Distribution Cost of Distributed Neural Networks in Wireless Sensor Networks
Abstract—This paper presents a novel study on how to distribute neural networks in a wireless sensor networks (WSNs) such that the energy consumption is minimized while improving...
Peng Guan, Xiaolin Li