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» Embedded system synthesis under memory constraints
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FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
14 years 1 months ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni
DATE
2010
IEEE
107views Hardware» more  DATE 2010»
14 years 15 days ago
Worst case delay analysis for memory interference in multicore systems
Abstract—Employing COTS components in real-time embedded systems leads to timing challenges. When multiple CPU cores and DMA peripherals run simultaneously, contention for access...
Rodolfo Pellizzoni, Andreas Schranzhofer, Jian-Jia...
AINA
2008
IEEE
14 years 1 months ago
WS-BPEL Process Compiler for Resource-Constrained Embedded Systems
Process management and workflow systems play an important role in the composition of services in business as well as automation environments. Processes are designed using tools a...
Hendrik Bohn, Andreas Bobek, Frank Golatowski
DT
2008
75views more  DT 2008»
13 years 7 months ago
Application Scenarios in Streaming-Oriented Embedded-System Design
In the past decade real-time embedded systems became more and more complex and pervasive. From the user perspective, these systems have stringent requirements regarding size, perfo...
Stefan Valentin Gheorghita, Twan Basten, Henk Corp...
USENIX
2003
13 years 8 months ago
Design and Implementation of Power-Aware Virtual Memory
Despite constant improvements in fabrication technology, hardware components are consuming more power than ever. With the everincreasing demand for higher performance in highly-in...
Hai Huang, Padmanabhan Pillai, Kang G. Shin