Sciweavers

95 search results - page 14 / 19
» Empirical evaluation of NAND flash memory performance
Sort
View
ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
13 years 7 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
PLDI
2012
ACM
11 years 9 months ago
JANUS: exploiting parallelism via hindsight
This paper addresses the problem of reducing unnecessary conflicts in optimistic synchronization. Optimistic synchronization must ensure that any two concurrently executing trans...
Omer Tripp, Roman Manevich, John Field, Mooly Sagi...
ICDE
2009
IEEE
165views Database» more  ICDE 2009»
14 years 9 months ago
Expressive Location-Based Continuous Query Evaluation with Binary Decision Diagrams
Many location-based services require rich and expressive query language support for filtering large amounts of information. In prominent location-based services thousands of conti...
Zhengdao Xu, Hans-Arno Jacobsen
ASPLOS
2008
ACM
13 years 9 months ago
The mapping collector: virtual memory support for generational, parallel, and concurrent compaction
Parallel and concurrent garbage collectors are increasingly employed by managed runtime environments (MREs) to maintain scalability, as multi-core architectures and multi-threaded...
Michal Wegiel, Chandra Krintz
LCTRTS
2001
Springer
13 years 12 months ago
Evaluating and Optimizing Thread Pool Strategies for Real-Time CORBA
Strict control over the scheduling and execution of processor resources is essential for many fixed-priority real-time applications. To facilitate this common requirement, the Re...
Irfan Pyarali, Marina Spivak, Ron Cytron, Douglas ...