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» Encoding Algorithms for Logic Synthesis
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FPL
2005
Springer
98views Hardware» more  FPL 2005»
15 years 8 months ago
A Verilog RTL Synthesis Tool for Heterogeneous FPGAs
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
Peter Jamieson, Jonathan Rose
164
Voted
GLVLSI
2002
IEEE
160views VLSI» more  GLVLSI 2002»
15 years 7 months ago
Computing walsh, arithmetic, and reed-muller spectral decision diagrams using graph transformations
Spectral techniques have found many applications in computeraided design, including synthesis, verification, and testing. Decision diagram representations permit spectral coeffici...
Whitney J. Townsend, Mitchell A. Thornton, Rolf Dr...
IGPL
1998
97views more  IGPL 1998»
15 years 2 months ago
Towards Structurally-Free Theorem Proving
Is it possible to compute in which logics a given formula is deducible? The aim of this paper is to provide a formal basis to answer positively this question in the context of sub...
Marcelo Finger
ILP
2000
Springer
15 years 6 months ago
Bayesian Logic Programs
First-order probabilistic models are recognized as efficient frameworks to represent several realworld problems: they combine the expressive power of first-order logic, which serv...
Kristian Kersting, Luc De Raedt
DAC
2003
ACM
15 years 7 months ago
Efficient compression and application of deterministic patterns in a logic BIST architecture
We present a novel method to efficiently generate, compress and apply test patterns in a logic BIST architecture. Patterns are generated by a modified automatic test pattern gener...
Peter Wohl, John A. Waicukauski, Sanjay Patel, Min...