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» End-to-end validation of architectural power models
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WSC
2008
13 years 10 months ago
Modeling and simulation of integrated intelligent systems
Complex systems consist of a large number of entities with their independent local rules and goals, along with their interactions. The effect of these properties tends to produce ...
Yongchang Li, Michael Balchanos, Bassem Nairouz, N...
AAECC
2007
Springer
87views Algorithms» more  AAECC 2007»
13 years 7 months ago
Towards an accurate performance modeling of parallel sparse factorization
We present a simulation-based performance model to analyze a parallel sparse LU factorization algorithm on modern cached-based, high-end parallel architectures. We consider supern...
Laura Grigori, Xiaoye S. Li
ARCS
2009
Springer
14 years 2 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
MTV
2006
IEEE
98views Hardware» more  MTV 2006»
14 years 1 months ago
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy...
JSA
2010
173views more  JSA 2010»
13 years 2 months ago
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
Quentin L. Meunier, Frédéric P&eacut...