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CC
2003
Springer
14 years 3 months ago
Improving Data Locality by Chunking
Cache memories were invented to decouple fast processors from slow memories. However, this decoupling is only partial, and many researchers have attempted to improve cache use by p...
Cédric Bastoul, Paul Feautrier
SENSYS
2004
ACM
14 years 3 months ago
TinySec: a link layer security architecture for wireless sensor networks
We introduce TinySec, the first fully-implemented link layer security architecture for wireless sensor networks. In our design, we leverage recent lessons learned from design vul...
Chris Karlof, Naveen Sastry, David Wagner
CONCURRENCY
2010
130views more  CONCURRENCY 2010»
13 years 10 months ago
Enabling high-speed asynchronous data extraction and transfer using DART
As the complexity and scale of current scientific and engineering applications grow, managing and transporting the large amounts of data they generate is quickly becoming a signif...
Ciprian Docan, Manish Parashar, Scott Klasky
HIPEAC
2009
Springer
14 years 4 months ago
MLP-Aware Runahead Threads in a Simultaneous Multithreading Processor
Abstract. Threads experiencing long-latency loads on a simultaneous multithreading (SMT) processor may clog shared processor resources without making forward progress, thereby star...
Kenzo Van Craeynest, Stijn Eyerman, Lieven Eeckhou...
CODES
2004
IEEE
14 years 1 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis