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» Energy exploration and reduction of SDRAM memory systems
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HIPEAC
2007
Springer
14 years 1 months ago
Performance/Energy Optimization of DSP Transforms on the XScale Processor
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
Paolo D'Alberto, Markus Püschel, Franz Franch...
HICSS
2007
IEEE
105views Biometrics» more  HICSS 2007»
14 years 1 months ago
Leveraging Social Networks To Motivate Individuals to Reduce their Ecological Footprints
What role can social networking websites play in supporting large-scale group action and change? We are proposing to explore their use in supporting individual reduction in person...
Jennifer Mankoff, Deanna Matthews, Susan R. Fussel...
ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
13 years 11 months ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier
CASES
2006
ACM
14 years 1 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
FPL
2004
Springer
144views Hardware» more  FPL 2004»
13 years 11 months ago
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...
Jingzhao Ou, Viktor K. Prasanna