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ICCD
2008
IEEE
175views Hardware» more  ICCD 2008»
14 years 5 months ago
On-chip high performance signaling using passive compensation
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines(T-lin...
Yulei Zhang, Ling Zhang, Akira Tsuchiya, Masanori ...
JSA
2007
162views more  JSA 2007»
13 years 8 months ago
Exploration of distributed shared memory architectures for NoC-based multiprocessors
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric inter...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
HPCA
2012
IEEE
12 years 3 months ago
SCD: A scalable coherence directory with flexible sharer set encoding
Large-scale CMPs with hundreds of cores require a directory-based protocol to maintain cache coherence. However, previously proposed coherence directories are hard to scale beyond...
Daniel Sanchez, Christos Kozyrakis
SIGCOMM
2010
ACM
13 years 8 months ago
NapSAC: design and implementation of a power-proportional web cluster
Energy consumption is a major and costly problem in data centers. A large fraction of this energy goes to powering idle machines that are not doing any useful work. We identify tw...
Andrew Krioukov, Prashanth Mohan, Sara Alspaugh, L...
SOSP
2001
ACM
14 years 4 months ago
SEDA: An Architecture for Well-Conditioned, Scalable Internet Services
We propose a new design for highly concurrent Internet services, which we call the staged event-driven architecture (SEDA). SEDA is intended to support massive concurrency demands...
Matt Welsh, David E. Culler, Eric A. Brewer