185 search results - page 14 / 37 » Energy-oriented compiler optimizations for partitioned memor... |
LCPC
2004
Springer
14 years 1 months ago
2004
Springer
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...
SAMOS
2004
Springer
14 years 1 months ago
2004
Springer
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
Increasing demand for performance and efficiency has driven the computer industry toward multicore systems. These systems have become the industry standard in almost all segments...
VLSID
2008
IEEE
14 years 8 months ago
2008
IEEE
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
CC
2008
Springer
13 years 9 months ago
2008
Springer
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...