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DAC
2004
ACM
14 years 8 months ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
CF
2009
ACM
14 years 2 months ago
A light-weight fairness mechanism for chip multiprocessor memory systems
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
Magnus Jahre, Lasse Natvig
ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
11 years 10 months ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
FPL
2008
Springer
86views Hardware» more  FPL 2008»
13 years 9 months ago
Instruction buffer mode for multi-context Dynamically Reconfigurable Processors
In multi-context Dynamically Reconfigurable Processor Array (DRPA), the required number of contexts is often increased by those with low resource usage. In order to execute such c...
Toru Sano, Masaru Kato, Satoshi Tsutsumi, Yohei Ha...
ERSA
2008
118views Hardware» more  ERSA 2008»
13 years 9 months ago
A Framework to Improve IP Portability on Reconfigurable Computers
- This paper presents a framework that improves the portability and ease-of-use issues of current Reconfigurable Computers (RCs). These two drawbacks should be solved in order for ...
Miaoqing Huang, Ivan Gonzalez, Sergio López...