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SIGMETRICS
1996
ACM
118views Hardware» more  SIGMETRICS 1996»
13 years 11 months ago
Integrating Performance Monitoring and Communication in Parallel Computers
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
Margaret Martonosi, David Ofelt, Mark Heinrich
AICCSA
2008
IEEE
222views Hardware» more  AICCSA 2008»
13 years 9 months ago
Managing access and flow control requirements in distributed workflows
Abstract. Workflows are operational business processes. Workfow Management Systems (WFMS) are concerned with the control and coordination of these workflows. In recent years, there...
Samiha Ayed, Nora Cuppens-Boulahia, Fréd&ea...
ATS
2009
IEEE
127views Hardware» more  ATS 2009»
14 years 18 days ago
On the Generation of Functional Test Programs for the Cache Replacement Logic
Caches are crucial components in modern processors (both stand-alone or integrated into SoCs) and their test is a challenging task, especially when addressing complex and high-fre...
Wilson J. Perez, Danilo Ravotto, Edgar E. Sá...
SIGOPS
2010
179views more  SIGOPS 2010»
13 years 2 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
ASPLOS
2008
ACM
13 years 9 months ago
Learning from mistakes: a comprehensive study on real world concurrency bug characteristics
The reality of multi-core hardware has made concurrent programs pervasive. Unfortunately, writing correct concurrent programs is difficult. Addressing this challenge requires adva...
Shan Lu, Soyeon Park, Eunsoo Seo, Yuanyuan Zhou