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» Engineering Abstractions in Model Checking and Testing
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AOSD
2009
ACM
14 years 2 months ago
Modelling hardware verification concerns specified in the e language: an experience report
e is an aspect-oriented hardware verification language that is widely used to verify the design of electronic circuits through the development and execution of testbenches. In rec...
Darren Galpin, Cormac Driver, Siobhán Clark...
DLOG
2009
13 years 5 months ago
Explaining by Example: Model Exploration for Ontology Comprehension
Abstract. In this paper, we describe an approach for ontology comprehension support called model exploration in which models for ontologies are generated and presented interactivel...
Johannes Bauer, Ulrike Sattler, Bijan Parsia
ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
13 years 5 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
TSE
2011
114views more  TSE 2011»
13 years 2 months ago
Loupe: Verifying Publish-Subscribe Architectures with a Magnifying Lens
Abstract— The Publish-Subscribe (P/S) communication paradigm fosters high decoupling among distributed components. This facilitates the design of dynamic applications, but also i...
Luciano Baresi, Carlo Ghezzi, Luca Mottola
VLSID
2007
IEEE
97views VLSI» more  VLSID 2007»
14 years 8 months ago
Efficient Microprocessor Verification using Antecedent Conditioned Slicing
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraha...