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SLIP
2005
ACM
14 years 2 months ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 5 months ago
Simultaneous Shield and Buffer Insertion for Crosstalk Noise Reduction in Global Routing
We present a method for incorporating crosstalk reduction criteria into global routing under an innovative power supply architecture, while considering the constraints imposed by ...
Tianpei Zhang, Sachin S. Sapatnekar
ATMOS
2009
13 years 9 months ago
Delay Management with Re-Routing of Passengers
Trains often arrive delayed at stations where passengers have to change to other trains. The question of delay management is whether these trains should wait for the original train...
Twan Dollevoet, Dennis Huisman, Marie Schmidt, Ani...
24
Voted
DAC
2005
ACM
13 years 10 months ago
How accurately can we model timing in a placement engine?
This paper presents a novel placement algorithm for timing optimization based on a new and powerful concept, which we term differential timing analysis. Recognizing that accurate ...
Amit Chowdhary, Karthik Rajagopal, Satish Venkates...
ISCC
2003
IEEE
128views Communications» more  ISCC 2003»
14 years 2 months ago
A Load Balancing Scheme for Congestion Control in MPLS Networks
In this paper we develop a Load Balancing scheme for networks based on the MPLS framework. The proposed algorithm (DYLBA - Dynamic Load Balancing Algorithm) implements a local sea...
Elio Salvadori, Roberto Battiti