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114
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CODES
2007
IEEE
15 years 9 months ago
2007
IEEE
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
136
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CODES
2007
IEEE
15 years 9 months ago
2007
IEEE
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
125
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CODES
2007
IEEE
15 years 9 months ago
2007
IEEE
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
130
Voted
CODES
2007
IEEE
15 years 9 months ago
2007
IEEE
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
128
Voted
EMSOFT
2007
Springer
15 years 8 months ago
2007
Springer
Non-volatile RAM (NVRAM) such as PRAM (Phase-change RAM), FeRAM (Ferroelectric RAM), and MRAM (Magnetoresistive RAM) has characteristics of both non-volatile storage and random ac...