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» Enhancing Real-Time Schedules to Tolerate Transient Faults
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ISPA
2004
Springer
14 years 4 months ago
Highly Reliable Linux HPC Clusters: Self-Awareness Approach
Abstract. Current solutions for fault-tolerance in HPC systems focus on dealing with the result of a failure. However, most are unable to handle runtime system configuration change...
Chokchai Leangsuksun, Tong Liu, Yudan Liu, Stephen...
ISCA
2007
IEEE
120views Hardware» more  ISCA 2007»
14 years 5 months ago
Examining ACE analysis reliability estimates using fault-injection
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
Nicholas J. Wang, Aqeel Mahesri, Sanjay J. Patel
DSD
2011
IEEE
194views Hardware» more  DSD 2011»
12 years 11 months ago
Reliability-Aware Design Optimization for Multiprocessor Embedded Systems
—This paper presents an approach for the reliability-aware design optimization of real-time systems on multi-processor platforms. The optimization is based on an extension of wel...
Jia Huang, Jan Olaf Blech, Andreas Raabe, Christia...
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
14 years 2 months ago
Optimizations of an application-level protocol for enhanced dependability in FlexRay
FlexRay [9] is an automotive standard for high-speed and reliable communication that is being widely deployed for next generation cars. The protocol has powerful errordetection me...
Wenchao Li, Marco Di Natale, Wei Zheng, Paolo Gius...
ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
14 years 3 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani