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» Error Floors of LDPC Coded BICM
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ICC
2007
IEEE
107views Communications» more  ICC 2007»
14 years 2 months ago
Error Floors of LDPC Coded BICM
Abstract— In recent years performance prediction for communication systems utilizing iteratively decodable codes has been of considerable interest. There have been significant b...
Aditya Ramamoorthy, Nedeljko Varnica
GLOBECOM
2006
IEEE
14 years 1 months ago
On Lowering the Error Floor of High Order Turbo BICM Schemes Over Fading Channels
— A new approach for the association of the well known turbo codes to modulation schemes is presented. This method is designed for flat fading channels. It presents the advantage...
Charbel Abdel Nour, Catherine Douillard
TIT
2010
103views Education» more  TIT 2010»
13 years 2 months ago
Analysis of absorbing sets and fully absorbing sets of array-based LDPC codes
The class of low-density parity-check (LDPC) codes is attractive, since such codes can be decoded using practical message-passing algorithms, and their performance is known to app...
Lara Dolecek, Zhengya Zhang, Venkat Anantharam, Ma...
GLOBECOM
2006
IEEE
14 years 1 months ago
Investigation of Error Floors of Structured Low-Density Parity-Check Codes by Hardware Emulation
Abstract−Several high performance LDPC codes have paritycheck matrices composed of permutation submatrices. We design a parallel-serial architecture to map the decoder of any str...
Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Ven...
ISCAS
2006
IEEE
99views Hardware» more  ISCAS 2006»
14 years 1 months ago
High-rate quasi-cyclic LDPC codes for magnetic recording channel with low error floor
— By implementing an FPGA-based simulator, we investigate the performance of high-rate quasi-cyclic (QC) LDPC codes for the magnetic recording channel at very low sector error ra...
Hao Zhong, Tong Zhang, Erich F. Haratsch