Sciweavers

710 search results - page 113 / 142
» Estimating design time for system circuits
Sort
View
CASES
2009
ACM
14 years 3 months ago
Tight WCRT analysis of synchronous C programs
Accurate estimation of the tick length of a synchronous program is essential for efficient and predictable implementations that are devoid of timing faults. The techniques to dete...
Partha S. Roop, Sidharta Andalam, Reinhard von Han...
CODES
2008
IEEE
13 years 10 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar...
CHI
2003
ACM
14 years 8 months ago
You're getting warmer!: how proximity information affects search behavior in physical spaces
This paper describes the results of a Wizard of Oz study of people's search behavior using BuddySystem, a proximitysensing system designed to help end-users locate people, pl...
Leila Takayama, Lawrence Leung, Xiaodong Jiang, Ja...
SIGMOD
2010
ACM
214views Database» more  SIGMOD 2010»
14 years 1 months ago
ParaTimer: a progress indicator for MapReduce DAGs
Time-oriented progress estimation for parallel queries is a challenging problem that has received only limited attention. In this paper, we present ParaTimer, a new type of timere...
Kristi Morton, Magdalena Balazinska, Dan Grossman
CODES
2005
IEEE
14 years 2 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...