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» Estimating design time for system circuits
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TCOS
2010
13 years 3 months ago
PET SNAKE: A Special Purpose Architecture to Implement an Algebraic Attack in Hardware
Abstract. In [24] Raddum and Semaev propose a technique to solve systems of polynomial equations over F2 as occurring in algebraic attacks on block ciphers. This approach is known ...
Willi Geiselmann, Kenneth Matheis, Rainer Steinwan...
INFOCOM
2009
IEEE
14 years 3 months ago
Decentralized Stochastic Control of Delay Tolerant Networks
—We study in this paper optimal stochastic control issues in delay tolerant networks. We first derive the structure of optimal two-hop forwarding policies. In order to be implem...
Eitan Altman, Giovanni Neglia, Francesco De Pelleg...
ARC
2006
Springer
124views Hardware» more  ARC 2006»
14 years 7 days ago
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
Su-Shin Ang, George A. Constantinides, Peter Y. K....
WSC
1997
13 years 9 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson
EICS
2010
ACM
13 years 5 months ago
An automated routine for menu structure optimization
We propose an automated routine for hierarchical menu structure optimization. A computer advice-giving system founded on the mathematical model of menu navigation directs the desi...
Mikhail V. Goubko, Alexander I. Danilenko