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» Estimating design time for system circuits
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ISCAS
2003
IEEE
153views Hardware» more  ISCAS 2003»
14 years 20 days ago
A VLSI model of range-tuned neurons in the bat echolocation system
The neural computations that support bat echolocation are of great interest to both neuroscientists and engineers, due to the complex and extremely time-constrained nature of the ...
Matthew Cheely, Timothy K. Horiuchi
ISCAS
2006
IEEE
86views Hardware» more  ISCAS 2006»
14 years 1 months ago
Fast timing analysis of plane circuits via two-layer CNN-based modeling
Abstract— A fast timing analysis of plane circuits via two-layer CNNbased modeling, which is necessary for the solution of power/signal integrity problems in printed circuit boar...
Yuichi Tanji, Hideki Asai, Masayoshi Oda, Yoshifum...
SERP
2003
13 years 8 months ago
Experiences Developing an E-Whiteboard-Based Circuit Designer
E-whiteboards - large image display surfaces (LIDS) that support data input with pen-based sketching - have become more readily available in recent times. We describe a prototype ...
Ray Liu, Lisa Wong, John C. Grundy
NIPS
2000
13 years 8 months ago
Processing of Time Series by Neural Circuits with Biologically Realistic Synaptic Dynamics
Experimental data show that biological synapses behave quite differently from the symbolic synapses in common artificial neural network models. Biological synapses are dynamic, i....
Thomas Natschläger, Wolfgang Maass, Eduardo D...
VTC
2006
IEEE
14 years 1 months ago
An Initial Timing Offset Estimation Method for OFDM Systems in Rayleigh Fading Channel
- An initial timing offset estimation method for orthogonal frequency-division multiplexing (OFDM) systems is proposed. Conventional preamble-based synchronization methods result i...
Seung Duk Choi, Jung Min Choi, Jae Hong Lee