710 search results - page 28 / 142 » Estimating design time for system circuits |
IPPS
2002
IEEE
14 years 2 months ago
2002
IEEE
Accurate estimation of signal delay is critical to the design and verification of VLSI circuits. At very high frequencies, signal delay in circuits with small feature sizes is do...
GLVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
Reliability modeling and evaluation is expected to be one of the major issues in emerging nano-devices and beyond 22nm CMOS. Such devices would have inherent propensity for gate f...
GLVLSI
2009
IEEE
14 years 1 months ago
2009
IEEE
A methodology is proposed to efficiently estimate the substrate noise generated by large scale aggressor circuits. Small spatial voltage differences within the ground distribution...
CODES
2008
IEEE
13 years 11 months ago
2008
IEEE
The capacity of flash-memory storage systems grows at a speed similar to many other storage systems. In order to properly manage the product cost, vendors face serious challenges ...
TWC
2008
13 years 9 months ago
2008
In this paper, we provide a complete study on the training based channel estimation issues for relay networks that employ the amplify-and-forward (AF) transmission scheme. We first...