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» Evaluating CMPs and Their Memory Architecture
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HPCA
2001
IEEE
14 years 8 months ago
An Architectural Evaluation of Java TPC-W
The use of the Java programming language for implementing server-side application logic is increasing in popularity, yet there is very little known about the architectural require...
Harold W. Cain, Ravi Rajwar, Morris Marden, Mikko ...
AAAIDEA
2005
IEEE
14 years 1 months ago
Design and Evaluation of Diffserv Functionalities in the MPLS Edge Router Architecture
—Differentiated Service (DiffServ) in combination with Multi-Protocol Label Switching (MPLS) is a promising technology in converting the best-effort Internet into a QoS-capable n...
Wei-Chu Lai, Kuo-Ching Wu, Ting-Chao Hou
IEEEPACT
2003
IEEE
14 years 28 days ago
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU
Graphics and media processing is quickly emerging to become one of the key computing workloads. Programmable graphics processors give designers extra flexibility by running a sma...
Mauricio Breternitz Jr., Herbert H. J. Hum, Sanjee...
IPPS
2007
IEEE
14 years 1 months ago
Experimental Evaluation of Emerging Multi-core Architectures
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s law is facing practical challenges. As a result, the multi-core processor arch...
Abdullah Kayi, Yiyi Yao, Tarek A. El-Ghazawi, Greg...
IPPS
1994
IEEE
13 years 11 months ago
Parallel Evaluation of a Parallel Architecture by Means of Calibrated Emulation
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...