501 search results - page 53 / 101 » Evaluating CMPs and Their Memory Architecture |
PPL
2008
13 years 7 months ago
2008
In this work we present an initial performance evaluation of Intel's latest, secondgeneration quad-core processor, Nehalem, and provide a comparison to first-generation AMD a...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Network line cards are experiencing ever increasing line rates, random data bursts, and limited space. Hence, they are more vulnerable than other processormemory environments, to ...
PODC
1994
ACM
13 years 11 months ago
1994
ACM
In this paper, we investigate the practical performance of lock-free techniques that provide synchronization on shared-memory multiprocessors. Our goal is to provide a technique t...
CF
2005
ACM
13 years 9 months ago
2005
ACM
This paper evaluates how much extended dictionary-based code compression techniques can reduce the static code size. In their simplest form, such methods statically identify ident...