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FCCM
2004
IEEE
144views VLSI» more  FCCM 2004»
13 years 11 months ago
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
In this paper we present a novel use of an FPGA as a computing element for streaming based application. We investigate the virtualized execution of dynamic reconfigurable tasks. We...
Matthias Dyer, Marco Platzner, Lothar Thiele
ICPADS
2010
IEEE
13 years 5 months ago
Data-Aware Task Scheduling on Multi-accelerator Based Platforms
To fully tap into the potential of heterogeneous machines composed of multicore processors and multiple accelerators, simple offloading approaches in which the main trunk of the ap...
Cédric Augonnet, Jérôme Clet-O...
IISWC
2008
IEEE
14 years 1 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
HCW
1999
IEEE
13 years 11 months ago
Multiple Cost Optimization for Task Assignment in Heterogeneous Computing Systems Using Learning Automata
A framework for task assignment in heterogeneous computing systems is presented in this work. The framework is based on a learning automata model. The proposed model can be used f...
Raju D. Venkataramana, N. Ranganathan
CODES
2006
IEEE
14 years 1 months ago
A run-time, feedback-based energy estimation model For embedded devices
We present an adaptive, feedback-based, energy estimation model for battery-powered embedded devices such as sensor network gateways and hand-held computers. Our technique maps ha...
Selim Gurun, Chandra Krintz