1304 search results - page 109 / 261 » Evaluating Hardware Compilation Techniques |
137
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IEEEPACT
2002
IEEE
15 years 9 months ago
2002
IEEE
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
157
Voted
DELTA
2010
IEEE
15 years 9 months ago
2010
IEEE
— FPGAs, (Field-Programmable Gate Arrays) are often used for embedded image processing applications. Parallelism, and in particular pipelining, is the most suitable architecture ...
166
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DAC
2003
ACM
16 years 5 months ago
2003
ACM
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
151
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LCTRTS
2004
Springer
15 years 10 months ago
2004
Springer
Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. ...
148
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SP
2009
IEEE
15 years 11 months ago
2009
IEEE
—This paper studies and evaluates the extent to which automated compiler techniques can defend against timing-based side-channel attacks on modern x86 processors. We study how mo...