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ICCD
2007
IEEE
109views Hardware» more  ICCD 2007»
15 years 8 months ago
Improving cache efficiency via resizing + remapping
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
Subramanian Ramaswamy, Sudhakar Yalamanchili
CORR
2007
Springer
172views Education» more  CORR 2007»
15 years 4 months ago
A Data-Parallel Version of Aleph
This is to present work on modifying the Aleph ILP system so that it evaluates the hypothesised clauses in parallel by distributing the data-set among the nodes of a parallel or di...
Stasinos Konstantopoulos
DAC
2009
ACM
16 years 5 months ago
Context-sensitive timing analysis of Esterel programs
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
Lei Ju, Bach Khoa Huynh, Samarjit Chakraborty, Abh...
ICLP
1995
Springer
15 years 8 months ago
A Method for Implementing Equational Theories as Logic Programs
Equational theories underly many elds of computing, including functional programming, symbolic algebra, theorem proving, term rewriting and constraint solving. In this paper we sh...
Mantis H. M. Cheng, Douglas Stott Parker Jr., Maar...
IJAIT
2008
99views more  IJAIT 2008»
15 years 4 months ago
Optimal Basic Block Instruction Scheduling for Multiple-Issue Processors Using Constraint Programming
Instruction scheduling is one of the most important steps for improving the performance of object code produced by a compiler. A fundamental problem that arises in instruction sch...
Abid M. Malik, Jim McInnes, Peter van Beek