1304 search results - page 228 / 261 » Evaluating Hardware Compilation Techniques |
ISCA
1996
IEEE
13 years 12 months ago
1996
IEEE
In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level parallelism, resulting in increasing ...
CAV
2004
Springer
13 years 11 months ago
2004
Springer
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...
BMCBI
2010
13 years 7 months ago
2010
Background: Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve...
ICDE
2008
IEEE
14 years 9 months ago
2008
IEEE
In this paper we explore database segmentation in the context of a column-store DBMS targeted at a scientific database. We present a novel hardware- and scheme-oblivious segmentati...
ICALP
2009
Springer
14 years 8 months ago
2009
Springer
We present an AC1 (logDCFL) algorithm for checking LTL formulas over finite paths, thus establishing that the problem can be efficiently parallelized. Our construction provides a f...